Capacitorless LDO for High Frequency Applications

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International Research Journal of Engineering and Technology (IRJET) Volume: 04 Issue: 05 | May -2017

www.irjet.net

e-ISSN: 2395 -0056 p-ISSN: 2395-0072

CAPACITORLESS LDO FOR HIGH FREQUENCY APPLICATIONS Jeyashri.M1, SeemaSerin.A.S2, Vennila.P3, Lakshmi Priya.R4 1PG

Scholar, Department of ECE, Theni Kammavar Sangam College of Technology, Tamilnadu, India. Scholar, Department of ECE, Theni Kammavar Sangam College of Technology, Tamilnadu, India. 3PG Scholar, Department of ECE, Theni Kammavar Sangam College of Technology, Tamilnadu, India. 4Assistant Professor, Department of ECE, Theni Kammavar Sangam College of Technology, Tamilnadu, India. 2PG

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Abstract – Power saving is importa nt in all portable

electronic devices like cellular phones and PDAs. This is essential to reduce the standby power and improve the battery runtime. Single stage regulator topologies are mainly used in embedded applications because of low power consumption. A single stage and adaptive biased low-dropout regulator is used to achieve a comparable dc load regulation. This is done mainly by modifying the adaptive bias loop which improves both the differential mode signals as well as common-mode signals. In addition, the proposed regulator is stable for a wide range of logics with variable capacitors and also for the capacitor-less conditions. The proposed regulator is implemented in a standard 0.18-μm CMOS technology.

The advantages of low dropout voltage regulator DC to DC regulators include the absence of switching noise, device size is small, and design simplicity is greater.

Key Words:

Low Drop-Out (LDO) regulator, Adaptive biasing, Single Stage Regulator, CMOS Technology, Load Regulation. Fig -1: General LDO Regulator

1. INTRODUCTION A low-dropout (LDO) regulator is providing a clean supply due to low noise, ripple-free characteristics and less area. LDO regulator is used to supply a high load current demand, for a major challenge to maintain the dc accuracy of the output voltage. In electronics circuits, the dropout voltage of a regulator is the difference between the output voltage and input voltage. Dropout voltage for a general purpose integrated circuit regulator can high as 2 Volt, but low dropout regulators have a dropout of less than 100 mV at full load of the circuit. The load is very depending on the load for the dropout voltage in the regulator. Higher load will increasing usually, due to the regulator's pass transistor and circuitry of the internal resistance. Dropout voltage varies to temperature is varied. Dropout voltage is specified range of temperatures as well as load. Determine the efficiency of the voltage regulator in the Dropout voltage and quiescent current. Dropout voltage is low due to improve efficiency. A low-dropout is mean DC linear voltage regulator that can regulate the output voltage even when the supply voltage is very close to the output voltage is called low dropout or LDO regulator.

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Impact Factor value: 5.181

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The general LDO regulator is the Input supply voltage to given as the DC-DC Switching Converter is the analog waveform to the LDO Regulator is the Digital waveform to the load is Block.

2. CONVENTIONAL SINGLE STAGE AB- LDO TOPOLOGIES 2.1Topology-1 (Differential Feedback Amplifier) In operational Tran’s conductance amplifier is the voltage is applied across the inputs of the currents I1 and I2 become different. The amplifier of the bias current is made signal dependent by adding an additional current source to the tail current source for realize A. “A” is the current feedback factor. The currents at the input is subtract are provided on the current mirrors, it is define a differential feedback amplifier. In the differential feedback amplifier is the large number of transistors are used.

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