International Research Journal of Engineering and Technology (IRJET)
e-ISSN: 2395 -0056
Volume: 04 Issue: 05 | May -2017
p-ISSN: 2395-0072
www.irjet.net
Traffic Light Controller based on FPGA Apoorva S N1, Simran R Karthik2, Rakesh M B3 1,2student,
Dept. of Telecommunication, SIT,Tumkur,Karnataka,India Dept. of Telecommunication,SIT,Tumkur, Karnataka, India ---------------------------------------------------------------------***--------------------------------------------------------------------3Asst.Professor,
Abstract - Traffic light control systems are widely used to
monitor and control the movement of automobiles at the junction of several roads. Traffic signals are essential to guarantee safe driving at road intersections and aim to realize smooth movement of vehicles. But there is an inherent problem in the current traffic signal system. There is a lack of switching on and off of traffic signals based on the number of vehicles on the roads which results in long waiting times for vehicles on busy routes as there is uniform waiting time for all routes. So an approach is taken where different routes at the junction will have different waiting times. This project work tries to achieve the different waiting times based on the assumption that some routes have lesser traffic than other. Here the functional simulation is achieved through Verilog programming language and implemented on Xilinx 14.7.The switching of different traffic lights through several states is achieved through Moore state diagram .The design is implemented on Spartan 6 family. The implementation results show that duration for which green light is on is different for different routes. Thus the traffic congestion can be reduced as the vehicles on the route with the greater vehicle density will not have to wait for a longer duration for the routes with lesser vehicle density. Key Words: Traffic light, Verilog, FPGA, Moore.
implemented on Spartan-6 XC6SLX9 FPGA development kit. The design of adaptable traffic control system is carried out for a junction consisting of four roads. To some extent, traffic jam or unreasonably latency time of stoppage of vehicles is solved. An efficient traffic control system is designed using Moore finite state machines.
1.1 Road Structure Generally, a traffic signal system has three lights. A green light on the bottom of the signal indicates the traffic to proceed, a yellow light in the middle warns the traffic to slow and prepare to stop, and red light on the top indicates the traffic to stop. Figure-1 shows structure of any junction consisting of four main roads and each road is divided into two main roads (straight and cross). Eight traffic signals L1, L2,.‌L8 have been used. The signals on straight roads are L1, L3, L5 and L7 , while L2, L4, L6 and L8 are traffic signals on cross roads. Traffic signals on straight roads have four lights: one red, one yellow and two green ,while signals on cross roads have two lights: red and green. Based on the assumption made L1, L3, L5 and L7 have denser traffic compared to L2, L4, L6 and L8. In L1, L3, L5 and L7 lanes, ON timing of green light will be doubled.
1.INTRODUCTION Traffic lights have been utilized to schedule and control the competing traffic flows at each road intersection using light cycle schedules. The traffic light sequence works on the specific switching of Red, Green and Yellow lights in a particular way with stipulated time form. They provide safe scheduling that allows all traffic flows to share the road intersection. The constant queuing delay at each road intersection decreases the traffic flow fluency and then decreases the traffic efficiency all over the road network. Conventional traffic control systems has a major drawback: Due to lack of adjustments in timing of traffic signals, the traffic has to wait for long duration on the lane with few vehicles , while on same lane the traffic cannot pass through in short time due to rush on lane. So, there is a need to develop a secure, fast and reliable traffic control system capable to control the vehicular traffic in rush hours without a need of traffic sergeant. Here, a real traffic control system using Moore state machine has been developed. The design is simulated and Š 2017, IRJET
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Fig. 1: Structure of junction consisting of four main roads
1.2 Moore FSM A general model of a Moore sequential machine is shown in Figure-2. Its output is generated from the state register block. The next state is determined using the present (current) input and the present (current) state[5]. Here the state register is also modeled using D flip-flops. ISO 9001:2008 Certified Journal
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