International Research Journal of Engineering and Technology (IRJET)
e-ISSN: 2395 -0056
Volume: 04 Issue: 02 | Feb -2017
p-ISSN: 2395-0072
www.irjet.net
AREA AND POWER PERFORMANCE ANALYSIS OF FLOATING POINT ALU USING PIPELINING Shubhi Sharma1, Sarvesh Sharma2, S.Ravi3 1M.Tech
VLSI Design, Vellore Institute of Technology, Vellore VLSI Design, Vellore Institute of Technology, Vellore 3Professor, Dept. of electronics Engineering, Vellore Institute of Technology, Tamil Nadu, India 2M.Tech
---------------------------------------------------------------------***--------------------------------------------------------------------floating point is utilized with FPGA (field programmable array) it has area and power and timing analysis of floating point arithmetic using pipelining. Nowdays all signal processing algorithms are presented by double examination overhead over fixed point. Floating point precision floating point for hardware implementation as large can in like manner be used as a piece of 3D precision needs large dynamic range. Fixed point has a representation which requires parallel execution. drawback over floating point, that is fixed point cannot be Floating point addition and multiplication are two most used for high precision computing as it lacks for large dynamic much of the time utilized operations utilizing double range. For designing of digital processor computation of precision. To vary the area, latency and power arithmetic operations is very important. Which can be easily researchers fused add and multiply unit, add and computed using floating point. In this paper we are subtract unit, divide and multiply unit. Using this computing four unit and one combined unit which are combination we can have numerous applications. Here performing the computation 0.0178 times faster at 0.26GHz we are utilizing Verilog HDL [3] configuration to do using Verilog RTL on cadence tool. pipelined operation and for arithmetic modules. The Key Words: Verilog, Floating point, ALU, Fixed point, four operations are addition, subtraction, FPGA. multiplication, division. Arithmetic logic unit (ALU) [1] is a microprocessor block. All the arithmetic operations 1.INTRODUCTION happens in this microprocessor block, consequently execution of these block are vital for the entire circuit. Nowdays all signal handling calculations are exhibited Pipelining procedure is utilized to outline computer by double precision floating point [2] for hardware and digital electronics which use to give us expanded implementation as expansive exactness needs throughput. This paper has execution of double extensive element range. Fixed point [1] has a precision that is 64 bits [3] which support four disadvantage over floating point, that is fixed point essential operations that is addition, subtraction, can't be utilized for high accuracy registering as it multiplication and division [9,10]. needs for extensive element range. At the point when floating point is utilized with FPGA [4] (field 2. FLOATING POINT NUMBER programmable Array) it has area and power and timing Representation of 64 bit floating point number that is double examination overhead over fixed point. For planning of precision is as shown below: digital processor calculation of number arithmetic operations is very important. Which can be effectively registered utilizing floating point. Floating point number can be utilized as a part of a few applications like FFT, DSP and where ever high performance is required. We utilize floating point to represent numbers which can't be displayed in whole number because of expansive or little values. At the point when
Abstract - We are computing the area, power and timing
Fig -1: 64 bit floating point number
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