International Journal of Electrical and Electronics Research ISSN 2348-6988 (online) Vol. 8, Issue 1, pp: (23-32), Month: January - March 2020, Available at: www.researchpublish.com
CARRY SAVE ADDER BY USING COPLANAR FULL ADDER WITHOUT INVERTER CHAIN DESIGN IN QCA Umashankar Yadav1, Umesh Barahdiya2 1
Research Scholar, Electronics and Communication Engineering Dept, NITM, Gwalior India 2
Professors, Electronics and Communication Engineering Dept, NITM, Gwalior India 1
uma624@gmail.com 2 umesh.baradia@gmail.com
Abstract: Quantum-dot cellular automata (QCA) are a new and promising computation paradigm, which can be a viable replacement for the complementary metal–oxide–semiconductor technology at nano-scale level. This technology provides a possible solution for improving the computation in various computational applications. It is expected that the CMOS technology reaches to the end of its road map because of many serious challenges such as short channel effect, impurity variations, high cost of lithography and more importantly, the heat. Quantum-dot cellular automata (QCA) are one of the alternative technologies that enable nano-scale circuit design with high performance and low power consumption features. In this aspect, QCA wire crossing is a challenging task in the coplanar QCA fabrication, as defects appear to be inherent due to two cell types in single layout structure. Some of previous design to introduce new approach for full adder design to full adder structure using an inverter chain. We have proposed a new low-complexity without using inverter chain to reduce circuitry requirement for extra Q-cell and power consumption repulsive geometry structural DUT, which consumes less Area compared to prior designs. To evaluate the usefulness of proposed design a new one bit full adder circuit and CSA with the help of basic full adder design presented. Our design achieves good improvement in cell count and consumes less area in comparison to the best single layer design. QCADesigner tool is used to validate the layout of the proposed designs. The usefulness of exhibited plans has been performed in QCADesigner form 2.0.3 Keywords: - QCA, Nano Technology’ QCA full adder, CSA, QCA Designer.
I. INTRODUCTION In coming years, reaching of CMOS technology to the end of its way is expected due to physical scalability, short channel effects (SCE), high cost of lithography and heating and cooling challenges. Therefore, the emerging technologies such as single electron transistor (SET), resonant tuning diode (RTD), carbon Nano tube field effect transistor (CNTFET) and quantum-dot cellular automata (QCA) can overcome the mentioned challenges. In the report summary of future technologies of international technology roadmap for semiconductor (ITRS), QCA has been introduced as an effective solution -. Due to its unique properties such as high speed, small size and low power consumption, this technology is one of the best options for designing high-density logical circuits. A square cell with four quantum dots located in its four corners is the simplest element in QCA technology. Based on the repulsion forces of columbic, the two electrons in this quantum cell are placed in the dots such that to minimize energy [4,5]. The International Technology Roadmap for Semiconductors (ITRS) has anticipated that size point of confinement of CMOS innovation will be constrained to around 5 nm to 10 nm and trusts this cutoff will be come to as ahead of schedule as 2017 [3]. The cutting edge processing devices are quantum PCs which depend on quantum mechanics. Quantum PCs depend on energy of photon and electron properties for performing figuring handling. They are parallel preparing that is a
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