Introduction to Computer Systems
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Course Introduction
Introduction to Computer Systems provides students with a foundational understanding of how computers work, exploring both hardware and software components. The course covers essential topics such as computer architecture, operating systems, memory management, input/output operations, and data representation. Students will learn how these components interact to execute programs and manage resources, gaining insights into the roles of compilers, assemblers, and system calls. By examining real-world examples and hands-on lab exercises, the course equips students with the practical knowledge required to navigate and analyze modern computer systems effectively.
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Computer Organization and Architecture 10th Edition by William Stallings
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Chapter 1: Basic Concepts and Computer Evolution
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Q1) __________ refers to those attributes of a system visible to a programmer. Answer: Computer architecture
Q2) Both the structure and functioning of a computer are,in essence, simple.
A)True
B)False
Answer: True
Q3) A __________ system is a set of interrelated subsystems.
A)secondary
B)hierarchical
C)complex
D)functional
Answer: B
Q4) _________ is the operation of each individual component as part of the structure. Answer: Function
Q5) Interfaces between the computer and peripherals is an example of an organizational attribute.
A)True
B)False
Answer: True
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Chapter 2: Performance Issues
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Q1) At the most fundamental level,the speed of a processor is dictated by the pulse frequency produced by the clock,measured in cycles per second,or _________.
Answer: Hertz (Hz)
Q2) ___________ potentially increases the amount of work available for the processor to execute.
A)Branch prediction
B)Performance balance
C)Pipelining
D)BIPS
Answer: A
Q3) Workstation systems cannot support highly sophisticated engineering and scientific applications.
A)True
B)False
Answer: False
Q4) The __________ Mean gives consistent results regardless of which system is used as a reference.
Answer: Geometric
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Page 4
Chapter 3: A Top-Level View of Computer Function and Interconnection
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Q1) The _________ receives read and write requests from the software above the TL and creates request packets for transmission to a destination via the link layer.
A)transaction layer
B)root layer
C)configuration layer
D)transport layer
Answer: A
Q2) The processing required for a single instruction is called a(n)__________ cycle.
A)execute
B)fetch
C)instruction
D)packet
Answer: C
Q3) The interconnection structure must support which transfer?
A)memory to processor
B)processor to memory
C)I / O to or from memory
D)all of the above
Answer: D
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Chapter 4: Cache Memory
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Q1) Internal memory capacity is typically expressed in terms of _________.
A)hertz
B)nanos
C)bytes
D)LOR
Q2) __________ computing deals with super computers and their software.
Q3) To achieve greatest performance the memory must be able to keep up with the processor.
A)True
B)False
Q4) The ________ rate is the rate at which data can be transferred into or out of a memory unit.
Q5) External,nonvolatile memory is referred to as ___________ or auxiliary memory.
Q6) Both sequential access and direct access involve a shared read- write mechanism. A)True
B)False
Q7) From a user's point of view the two most important characteristics of memory are capacity and _____________.
Q8) The cache consists of blocks called __________.
Q9) The three key characteristics of memory are capacity,access time,and _______. Page 6
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Page 7
Chapter 5: Internal Memory
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Q1) Which of the following memory types are nonvolatile?
A)erasable PROM
B)programmable ROM
C)flash memory
D)all of the above
Q2) Nonvolatile means that power must be continuously supplied to the memory to preserve the bit values.
A)True
B)False
Q3) _________ can be caused by power supply problems or alpha particles.
A)Soft errors
B)AGT errors
C)Hard errors
D)SEC errors
Q4) A _________ RAM is made with cells that store data as charge on capacitors.
Q5) The two traditional forms of RAM used in computers are DRAM and SRAM.
A)True
B)False
Q6) A typical DRAM pin configuration will include the __________ pin if necessary in order to have an even number of pins.
Page 8
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Chapter 6: External Memory
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Q1) The head must generate or sense an electromagnetic field of sufficient magnitude to write and read properly.
A)True
B)False
Q2) Data are transferred to and from the disk in __________. A)tracks
B)gaps
C)sectors
D)pits
Q3) Data is organized on the platter in a concentric set of rings called ________.
Q4) There are typically hundreds of sectors per track and they may be either fixed or variable lengths.
A)True
B)False
Q5) In a _________ disk there is one read-write head per track and all of the heads are mounted on a rigid arm that extends across all tracks.
Q6) A _________ drive is a memory device made with solid-state components that can be used as a replacement to a hard disk drive.
Q7) The time required to move the disk arm to the required track is the __________.
Page 9
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Chapter 7: Input Output
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Q1) A ________ connects InfiniBand subnets,or connects an InfiniBand switch to a network such as a local area network,wide area network,or storage area network.
A)memory controller
B)TCA
C)HCA
D)router
Q2) The ________ layer is the key to the operation of Thunderbolt and what makes it attractive as a high-speed peripheral I / O technology.
A)cable
B)application
C)common transport
D)physical
Q3) A ________ machine is an instance of an operating system along with one or more applications running in an isolated memory partition within the computer,enabling different operating systems to run in the same computer at the same time,as well as preventing applications from interfering with each other.
Q4) We can broadly classify external devices into three categories: human readable,communication,and __________.
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Chapter 8: Operating System Support
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Q1) Facilities and services provided by the OS that assist the programmer in creating programs are in the form of _________ programs that are not actually part of the OS but are accessible through the OS.
A)utility
B)multitasking
C)JCL
D)logical address
Q2) The technique where memory is expanded to hold three,four,or more programs and switch among all of them is __________,(or multitasking).
Q3) Scheduling and memory management are the two OS functions that are most relevant to the study of computer organization and architecture.
A)True
B)False
Q4) With a batch operating system the user does not have direct access to the processor.
A)True
B)False
Q5) Early computer systems presented two main problems: setup time and _____.
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Chapter 9: Number Systems
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Q1) Decimal "10" is _________ in hexadecimal.
A)1
B)A
C)0
D)FF
Q2) Given ( ...a3a2a1a0.a-1a-2a-3 ...)r,the dot between a0 and a-1 is called the ________.
Q3) Binary digits grouped into sets of four bits are called a _________.
Q4) Which digit represents "hundreds" in the number 8732?
A)8
B)7
C)3
D)2
Q5) Although convenient for computers,the binary system is exceedingly cumbersome for human beings.
A)True
B)False
Q6) In any number,the rightmost digit is referred to as the most significant digit.
A)True
B)False
Page 12
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Chapter 10: Computer Arithmetic
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Q1) Overflow can only occur if there is a carry.
A)True
B)False
Q2) Compared with addition and subtraction,multiplication is a complex operation,whether performed in hardware of software.
A)True
B)False
Q3) An advantage of biased representation is that nonnegative floating-point numbers can be treated as integers for comparison purposes.
A)True
B)False
Q4) Actual floating-point representations include a special bit pattern to designate zero.
A)True
B)False
Q5) Booth's algorithm performs more additions and subtractions than a straightforward algorithm.
A)True B)False
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Chapter 11: Digital Logic
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Q1) Logical functions are implemented by the interconnection of decoders.
A)True
B)False
Q2) The _________ table provides the value of the next output when the inputs and the present output are known,which is exactly the information needed to design the counter or any sequential circuit.
A)excitation
B)Kenough
C)J-K flip-flop
D)FPGA
Q3) Also referred to as a field-programmable device (FPD),a __________ refers to any type of integrated circuit used for implementing digital hardware,where the chip can be configured by the end user to realize different designs.
Q4) Which of the following is a functionally complete set?
A)AND,NOT
B)NOR
C)AND,OR,NOT
D)all of the above
Q5) The simplest form of sequential circuit is the _________.
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Chapter 12: Characteristics and Functions
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Q1) _______ instructions are needed to transfer programs and data into memory and the results of computations back out to the user.
A)I / O
B)Transfer
C)Control
D)Branch
Q2) There must be ________ instructions for moving data between memory and the registers.
A)branch
B)logic
C)memory
D)I / O
Q3) Procedures do not allow programming tasks to be subdivided into smaller units.
A)True
B)False
Q4) The x86 provides four instructions to support procedure call / return: CALL,ENTER,LEAVE,and _________.
Q5) Memory references are faster than register references. A)True
B)False
Page 15
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Chapter 13: Addressing Modes and Formats
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Q1) The advantages of _________ addressing are that only a small address field is needed in the instruction and no time-consuming memory references are required.
A)direct
B)indirect
C)register
D)displacement
Q2) Not common on contemporary architectures,___________ requires only one memory reference and no special calculation,but provides only a limited address space.
Q3) The __________ byte consists of three fields: the Scale field,the Index field and the Base field.
A)SIB
B)VAX
C)PDP-11
D)ModR / M
Q4) The method of calculating the EA is the same for both base-register addressing and indexing.
A)True
B)False
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Chapter 14: Processor Structure and Function
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Q1) An instruction cycle includes the following stages: fetch,execute,and _______.
Q2) A __________ occurs when the pipeline,or some portion of the pipeline,must stall because conditions do not permit continued execution.
Q3) The processor needs to store instructions and data temporarily while an instruction is being executed.
A)True
B)False
Q4) The _________ is a small cache memory associated with the instruction fetch stage of the pipeline.
A)dynamic branch
B)loop table
C)branch history table
D)flag
Q5) The major components of the processor are an arithmetic and logic unit (ALU)and a __________.
Q6) A _________,also known as a branch hazard,occurs when the pipeline makes the wrong decision on a branch prediction and therefore brings instructions into the pipeline that must subsequently be discarded.
Q7) Data are exchanged with the processor from external memory through a
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Chapter 15: Reduced Instruction Set Computers
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Q1) _________ determines the control and pipeline organization.
A)Calculation
B)Execution sequencing
C)Operations performed
D)Operands used
Q2) Cache memory is a much faster memory than the register file.
A)True
B)False
Q3) Almost all RISC instructions use simple register addressing.
A)True
B)False
Q4) A tactic similar to the delayed branch is the _________,which can be used on LOAD instructions.
A)delayed load
B)delayed program
C)delayed slot
D)delayed register
Q5) The major cost in the life cycle of a system is hardware.
A)True
B)False
18
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Chapter 16: Parallelism and Superscalar Processors
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Q1) The Cortex-A8 targets a wide variety of mobile and consumer applications including mobile phones,set-top boxes,gaming consoles and automotives navigation / entertainment systems.
A)True
B)False
Q2) ________ indicates whether this micro-op is scheduled for execution,has been dispatched for execution,or has completed execution and is ready for retirement.
A)State
B)Memory address
C)Micro-op
D)Alias register
Q3) The essence of the ________ approach is the ability to execute instructions independently and concurrently in different pipelines.
A)scalar
B)branch
C)superscalar
D)flow dependency
Q4) An alternative to _________ is a scoreboarding.
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Chapter 17: Parallel Processing
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Q1) _________ causes results issuing from one functional unit to be fed immediately into another functional unit and so on.
A)Chaining
B)Rollover
C)Passive standby
D)Pipelining
Q2) Software cache coherence schemes attempt to avoid the need for additional hardware circuitry and logic by relying on the compiler and operating system to deal with the problem.
A)True
B)False
Q3) Both clusters and symmetric multiprocessors provide a configuration with multiple processors to support high-demand applications.
A)True
B)False
Q4) A ________ is a group of interconnected,whole computers working together as a unified computing resource that can create the illusion of being one machine.
Q5) _________ is the easiest multithreading approach to implement.
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Chapter 18: Multicore Computers
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Q1) Individual modules called systems are assigned to individual processors with ________ threading.
Q2) The _________ is an example of splitting off a separate,shared L3 cache,with dedicated L1 and L2 caches for each core processor.
A)IBM 370
B)ARM11 MPCore
C)AMD Opteron
D)Intel Core i7
Q3) The Intel Core i7-990X chip supports _________ forms of external communications to other chips.
A)4
B)2
C)6
D)8
Q4) An advantage of using a shared L2 cache on the chip is that data shared by multiple cores is not replicated at the shared cache level.
A)True
B)False
Q5) A single piece of silicon is called a ________.
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Chapter 19: General-Purpose Graphic Processing Units
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Q1) The fundamental building block of the Gen8 architecture is the ________ unit.
Q2) A subslice includes a unit called the _________,which is used for sampling texture and image surfaces.
A)stride
B)sampler
C)EU
D)floating-point
Q3) __________ are caused by limited SFUs,double-precision multiplication,and branching.
A)Structural hazards
B)RAW data hazards
C)Vertical hazards
D)Latency hazards
Q4) The equivalent GPU hardware component for a block is the CUDA multiprocessor (SM).
A)True
B)False
Q5) GPGPU is a computing platform and programming model created by NVIDIA.
A)True
B)False
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Chapter 20: Control Unit Operation
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Q1) The timing of processor operations is synchronized by the __________ and controlled by the control unit with control signals.
Q2) The number of machine cycles for an instruction depends on the number of times the processor must communicate with internal devices.
A)True
B)False
Q3) The execution of a program consists of the sequential execution of instructions.
A)True
B)False
Q4) __________ are the functional,or atomic,operations of a processor.
A)Micro-operations
B)Interrupts
C)Subcycles
D)All of the above
Q5) The __________ module handles multiple levels of interrupt signals.
A)interrupt control
B)incrementer address latch
C)serial I / O control
D)decrementer address latch
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Chapter 21: Microprogrammed Control
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Q1) To implement a control unit as an interconnection of basic logic elements is a very simple task.
A)True
B)False
Q2) It is important to design compact,time-efficient techniques for microinstruction branching.
A)True
B)False
Q3) A microprogram consists of a sequence of instructions in a microprogramming language.
A)True
B)False
Q4) The principal advantage of the use of microprogramming to implement a control unit is that it simplifies the design of the control unit.
A)True
B)False
Q5) An alternative,which has been used in many CISC processors,is to implement a __________ control unit.
Q6) The LSI-11 is a good example of a __________ microinstruction approach.
Page 24
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