Digital Systems Design
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Course Introduction
Digital Systems Design introduces the foundational concepts and techniques used to design, analyze, and implement digital electronic systems. The course covers topics such as binary number systems, Boolean algebra, logic gates, combinational and sequential circuit design, minimization techniques, and the use of hardware description languages (HDLs) like VHDL or Verilog. Students explore how digital components such as multiplexers, decoders, flip-flops, and registers are integrated into more complex systems such as arithmetic logic units (ALUs), memory modules, and programmable logic devices. Practical laboratory sessions reinforce theoretical knowledge through hands-on experiments and simulations, preparing students for advanced topics in digital electronics and embedded systems.
Recommended Textbook
Computer Organization and Architecture 10th Edition by William Stallings
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Chapter 1: Basic Concepts and Computer Evolution
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Q1) A common example of system interconnection is by means of a __________.
A)register
B)system bus
C)data transport
D)control device
Answer: B
Q2) When data are moved over longer distances,to or from a remote device,the process is known as __________.
A)data communications
B)registering
C)structuring
D)data transport
Answer: A
Q3) Computer organization refers to attributes of a system visible to the programmer.
A)True
B)False
Answer: False
Q4) _________ is the way in which the components are interrelated.
Answer: Structure
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Chapter 2: Performance Issues
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Q1) At the most fundamental level,the speed of a processor is dictated by the pulse frequency produced by the clock,measured in cycles per second,or _________.
Answer: Hertz (Hz)
Q2) ___________ potentially increases the amount of work available for the processor to execute.
A)Branch prediction
B)Performance balance
C)Pipelining
D)BIPS
Answer: A
Q3) With respect to changes in values,the __________ Mean gives equal weight to all of the values in the data set.
A)Harmonic
B)Arithmetic
C)Composite
D)Geometric
Answer: D
Q4) __________ Law applies to a queuing system. Answer: Little's
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Chapter 3: A Top-Level View of Computer Function and
Interconnection
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Q1) Computer systems contain a number of different buses that provide pathways between components at various levels of the computer system hierarchy.
A)True
B)False
Answer: True
Q2) The _________ receives read and write requests from the software above the TL and creates request packets for transmission to a destination via the link layer.
A)transaction layer
B)root layer
C)configuration layer
D)transport layer
Answer: A
Q3) A sequence of codes or instructions is called __________.
A)software
B)memory
C)an interconnect
D)a register
Answer: A
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Chapter 4: Cache Memory
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Q1) __________ memory consists of peripheral storage devices,such as disk and tape.
Q2) The L1 cache is slower than the L3 cache.
A)True
B)False
Q3) __________ memory is a facility that allows programs to address memory from a logical point of view,without regard to the amount of main memory physically available.
Q4) External,nonvolatile memory is referred to as ___________ or auxiliary memory.
Q5) The processor requires its own local memory.
A)True
B)False
Q6) __________ refers to whether memory is internal or external to the computer.
A)Location
B)Access
C)Hierarchy
D)Tag
Q7) With write back updates are made only in the cache.
A)True
B)False
Q8) One byte equals __________ bits.
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Chapter 5: Internal Memory
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Q1) Flash memory is only used for internal memory applications.
A)True
B)False
Q2) In earlier computers the most common form of random-access storage for computer main memory employed an array of doughnut-shaped ferromagnetic loops referred to as __________.
Q3) The traditional __________ chip is constrained both by its internal architecture and by its interface to the processor's memory bus.
Q4) Which of the following memory types are nonvolatile?
A)erasable PROM
B)programmable ROM
C)flash memory
D)all of the above
Q5) The two distinctive types of flash memory are designated as NOR and ______ .
Q6) The advantage of RAM is that the data or program is permanently in main memory and need never be loaded from a secondary storage device.
A)True
B)False
Q7) One of the most widely used forms of DRAM is the _________ DRAM.
Page 7
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Chapter 6: External Memory
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Q1) Data are recorded on and later retrieved from the disk via a conducting coil named the _________.
Q2) The areas between pits are called _________.
A)lands
B)sectors
C)cylinders
D)strips
Q3) Data are transferred to and from the disk in __________.
A)tracks
B)gaps
C)sectors
D)pits
Q4) The disadvantage of _________ is that the amount of data that can be stored on the long outer tracks is only the same as what can be stored on the short inner tracks.
A)SSD
B)CAV
C)ROM
D)CLV
Q5) The time required to move the disk arm to the required track is the __________.
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Chapter 7: Input Output
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Q1) A multipoint external interface provides a dedicated line between the I / O module and the external device.
A)True
B)False
Q2) Bus arbitration makes use of vectored interrupts.
A)True
B)False
Q3) The ________ contains I / O protocols that are mapped on to the transport layer.
A)cable
B)application
C)common transport
D)physical
Q4) The ________ command is used to activate a peripheral and tell it what to do.
A)control
B)test
C)read
D)write
Q5) There are four types of I / O commands that an I / O module may receive when it is addressed by a processor: control,test,write,and _________.
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Chapter 8: Operating System Support
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Q1) In an _________ system the user / programmer interacts directly with the computer,usually through a keyboard / display terminal to request the execution of a job or to perform a transaction.
Q2) Virtual memory schemes make use of a special cache called a ________ for page table entries.
A)TLB
B)HLL
C)VMC
D)SPB
Q3) A _________ is a collection of memory regions.
A)APX
B)nucleus
C)domain
D)page table
Q4) Privileged instructions are certain instructions that are designated special and can be executed only by the monitor.
A)True
B)False
Q5) Early computer systems presented two main problems: setup time and _____.
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Chapter 9: Number Systems
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Q1) In the number 3109,the 9 is referred to as the _________.
A)most significant digit
B)least significant digit
C)radix
D)base
Q2) The _________ system uses only the numbers 0 and 1.
A)positional
B)binary
C)hexadecimal
D)decimal
Q3) Four bits is called a _________.
A)radix point
B)byte
C)nibble
D)binary digit
Q4) Although convenient for computers,the binary system is exceedingly cumbersome for human beings.
A)True
B)False
Q5) (2 x 10-1)+ (5 x 10-2)+ (6 x 10-3)represents the number _________.
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Chapter 10: Computer Arithmetic
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Q1) __________ is when a positive exponent exceeds the maximum possible exponent value.
A)Significand underflow
B)Significand overflow
C)Exponent overflow
D)Exponent underflow
Q2) __________ is when the result is put back into the floating-point format and the extra bits must be eliminated in such a way as to produce a result that is close to the exact result.
Q3) __________ means that the number is too small to be represented and it may be reported as 0.
A)Negative underflow
B)Exponent underflow
C)Positive underflow
D)Significand underflow
Q4) For each 1 on the multiplier,an add and a shift operation are required; but for each 0 only a shift is required.
A)True
B)False
Q5) The use of subnormal numbers is referred to as _________ underflow.
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Chapter 11: Digital Logic
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Q1) The simplest form of sequential circuit is the _________.
Q2) Each gate is defined in three ways: graphic symbol,algebraic notation,and
Q3) A combinational circuit can be defined by Boolean equations,truth table,and
Q4) In the absence of parentheses,the AND operation takes precedence over the OR operation.
A)True
B)False
Q5) Any Boolean function can be implemented in electronic form as a network of gates.
A)True
B)False
Q6) The ________ flip-flop has two inputs and all possible combinations of input values are valid.
A)J-K
B)D
C)S-R
D)clocked S-R
Q7) The fundamental building block of all digital logic circuits is the _______.
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Chapter 12: Characteristics and Functions
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Q1) There must be ________ instructions for moving data between memory and the registers.
A)branch
B)logic
C)memory
D)I / O
Q2) A high-level language expresses operations in a basic form involving the movement of data to or from registers.
A)True
B)False
Q3) Which of the following is a true statement?
A)a procedure can be called from more than one location
B)a procedure call can appear in a procedure
C)each procedure call is matched by a return in the called program
D)all of the above
Q4) The __________ reference tells the processor where to fetch the next instruction after the execution of this instruction is complete.
Q5) _________ are bits in special registers that may be set by certain operations and used in conditional branch instructions.
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Chapter 13: Addressing Modes and Formats
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Q1) For _________,the address field references a main memory address and the referenced register contains a positive displacement from that address.
A)indexing
B)base-register addressing
C)relative addressing
D)all of the above
Q2) Programs written in assembly language are translated into machine language by an _________.
Q3) __________ has the advantage of flexibility,but the disadvantage of complexity.
A)Stack addressing
B)Displacement addressing
C)Direct addressing
D)Register addressing
Q4) Which of the following interrelated factors go into determining the use of the addressing bits?
A)number of operands
B)number of register sets
C)address range
D)all of the above
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Chapter 14: Processor Structure and Function
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Q1) The _________ contains the address of an instruction to be fetched.
A)instruction register
B)memory address register
C)memory buffer register
D)program counter
Q2) The ________ flag allows the programmer to disable debug exceptions so that the instruction can be restarted after a debug exception without immediately causing another debug exception.
Q3) The OS usually runs in ________.
A)supervisor mode
B)abort mode
C)undefined mode
D)fast interrupt mode
Q4) The ARM architecture supports _______ execution modes.
A)2
B)8
C)11
D)7
Q5) The _________ element is needed to transfer data between the various registers and the ALU.
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Chapter 15: Reduced Instruction Set Computers
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Q1) The R4000 can have as many as _______ instructions in the pipeline at the same time.
A)8
B)10
C)5
D)3
Q2) Unrolling can improve performance by increasing instruction parallelism by improving pipeline performance.
A)True
B)False
Q3) SPARC refers to an architecture defined by ________.
A)Microsoft
B)Apple
C)Sun Microsystems
D)IBM
Q4) The acronym SPARC stands for __________.
Q5) A ________ architecture replicates each of the pipeline stages so that two or more instructions at the same stage of the pipeline can be processed simultaneously.
Q6) The acronym RISC stands for __________.
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Chapter 16: Parallelism and Superscalar Processors
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Q1) ________ is a protocol used to issue instructions.
A)Micro-ops
B)Scalar
C)SIMD
D)Instruction issue policy
Q2) Instead of the first instruction producing a value that the second instruction uses,with ___________ the second instruction destroys a value that the first instruction uses.
A)in-order issue
B)resource conflict
C)antidependency
D)out-of-order completion
Q3) The superscalar approach has now become the standard method for implementing high-performance microprocessors.
A)True
B)False
Q4) The superscalar approach depends on the ability to execute multiple instructions in parallel.
A)True
B)False
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Chapter 17: Parallel Processing
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Q1) Which of the following is an essential characteristic of cloud computing?
A)rapid elasticity
B)measured service
C)broad network access
D)all of the above
Q2) The four deployment models defined by NIST are: public cloud,private cloud,community cloud,and __________ cloud.
Q3) Computer systems that fall into the __________ category have a sequence of data that is transmitted to a set of processors,each of which executes a different instruction sequence.
Q4) Symmetric multiprocessors (SMPs)are one of the earliest,and still the most common,example of parallel organization.
A)True
B)False
Q5) Both clusters and symmetric multiprocessors provide a configuration with multiple processors to support high-demand applications.
A)True
B)False
Q6) Two key characteristics of a process are: scheduling / execution and ________.
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Chapter 18: Multicore Computers
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Q1) The SCU uses hybrid MESI and _________ protocols to maintain coherency between the individual L1 data caches and the L2 cache.
Q2) Individual modules called systems are assigned to individual processors with ________ threading.
Q3) The increasingly difficult engineering challenge related to processor logic is one of the reasons that an increasing fraction of the processor chip is devote to the simpler memory logic.
A)True
B)False
Q4) ________ is a multithreaded process that provides scheduling and memory management for Java applications.
Q5) ________ threading is when many similar or identical tasks are spread across multiple processors.
Q6) The ________ is responsible for maintaining coherency among L1 data caches.
A)VFP unit
B)distributed interrupt controller
C)snoop control unit (SCU)
D)watchdog
Q7) A single piece of silicon is called a ________.
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Chapter 19: General-Purpose Graphic Processing Units
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Q1) __________ is a parallel computing platform and programming model created by NVIDIA and implemented by the GPUs that they produce.
Q2) All but one set of GPU processor cores will be idle,while one SM is bearing the full processing load.
A)True
B)False
Q3) GPGPU is a computing platform and programming model created by NVIDIA. A)True
B)False
Q4) In the CPU the control logic and __________ make up the majority of the CPU's real estate.
Q5) A group of threads assigned to a particular SM is a __________ . A)block
B)grid
C)unit
D)kernel
Q6) The largest GPUs are found in embedded systems. A)True
B)False
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Chapter 20: Control Unit Operation
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Q1) Knowing the machine instruction set does not play a part in knowing the functions that the processor must perform.
A)True
B)False
Q2) A single micro-operation generally involves which of the following?
A)a transfer between registers
B)a transfer between a register and an external bus
C)a transfer between a register and the ALU
D)all of the above
Q3) The ________ is connected to the data lines of the system bus.
A)MAR
B)PC
C)MBR
D)IR
Q4) The groupings of micro-operations must follow which rule?
A)a sequence of events does not need to be followed
B)use read to and write from the same register in one time unit
C)conflicts must be avoided
D)all of the above
Q5) The _____________ must control the state of the instruction cycle.
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Chapter 21: Microprogrammed Control
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Q1) The _________ is a 32-bit ALU with 64 registers that can be configured to operate as four 8-bit ALUs,two 16-bit ALUs,or a single 32-bit ALU.
A)PDP-11
B)8832
C)3033
D)8818
Q2) Two approaches can be taken to organizing the encoded microinstruction into fields: functional and __________.
Q3) The control unit design is very flexible.
A)True
B)False
Q4) The PDP-11 is the first member of the LSI-11 family that was offered as a single board processor.
A)True
B)False
Q5) Reading a microinstruction from the control memory is the same as executing that microinstruction.
A)True
B)False
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