International Research Journal of Engineering and Technology (IRJET)
e-ISSN: 2395-0056
Volume: 09 Issue: 05 | May 2022
p-ISSN: 2395-0072
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Challenges and Opportunities of FPGA Acceleration in Big Data Neetu Reji1, Smitha C Thomas2, Reshma Suku.3 1
M. Tech Student, Computer Science and Engineering, APJ Abdul Kalam Technological University, Kerala,India 23 Asst. Professor, Computer Science and Engineering, Mount Zion College of Engineering, Kadammanitta, Kerala, India ---------------------------------------------------------------------***---------------------------------------------------------------------
Abstract - FPGA with customized IP helps to lower the
frameworks are therefore limitless. The three areas of applications that could benefit from FPGA accelerated big data frameworks; applications with long-running queries, latency sensitive applications, and applications that aim to achieve a high energy efficiency.
power consumption to accelerate computation intensive segment for the application and optimize the performance. To transfer raw data from source server to data ware house ETL procedure is used in big data field. FPGA has been noticed in the industry because of its performance- re-programmable flexibility, per-power efficiency, and wide range of applicableness. In this paper we will discuss how programmable gate arrays help a Spark ETL workload to reduce high CPU utilization issue. It should release more CPU power to run some compute intensive jobs. Also we will discuss about benefits of FPGA in deep learning applications for AI.
Challenges: There are two main challenges in integrating FPGA accelerators with big data frameworks are transparency and efficiency. The user should not be aware of the FPGA acceleration and does not have to tune certain parameters in the framework. It is important because transparent integration lowers the barrier to adopt these technologies. The system should autonomously identify where and when certain parts of the computation can be accelerated to achieve transparency. There are two factors that play a role in the context of FPGA accelerators. First, the initial cost of developing an FPGA. It is generally more time consuming than software development for CPUs and GPUs, and requires in-depth knowledge about circuit design. Lastly, these FPGA accelerators are expensive. The industry standard is to run big data applications in a cloud environment so there is no need for end-users to buy any specialized hardware.
Key Words: Cloud computing, Computational Modeling, Field Programmable Gate Arrays, Parallel Processing, Flash EPROM.
1. INTRODUCTION “Big Data” is a broad term for datasets that are so large or complex. Workflows are the task oriented and often require more specific data than process. The Process is designed on a higher level scenarios that helps for decision making in organizational level. Big Data workflow is best illustrated in comparing traditional IT workloads with Big Data workloads. It may require many servers to run one application whereas traditional IT workloads requires one server to run many application. Big Data workloads run to the completion and traditional IT workloads run forever. The scale of big data will be representing the volume, velocity and variety of data. Volume indicate how much amount of data is generated. Velocity is used to indicate the speed of generating data and data generated in real time. Variety indicates the wide range in which the data can be encode.
FPGA is an IC form that have internal logic design which we can configure after manufacturing helps programmer to implement different IC without having to go through the manufacturing process, which is time consuming and expensive. This reconfiguration of the FPGA is done using description language. Data is processed in a dataflow manner. FPGAs implementing dataflow-oriented architectures with high levels of (pipeline) parallelism can provide high application throughput, often providing high energy efficiency. Latency-sensitive applications can leverage FPGA accelerators by directly connecting to the physical layer of a network, and perform data transformations without going through the software stacks of the host system. While these advantages of FPGA accelerators hold promise, difficulties associated with programming and integration limit their use.
To increasing the processing capacity has been a main area of prior research. Examples include CPU optimizations and the use of dedicated hardware accelerators such as GPUs. Another accelerator is the field programmable gate array or FPGA. These FPGAs consist of a re-configurable fabric that can be programmed to implement custom integrated circuit (IC) designs. This work investigates how these FPGA accelerators can be efficiently deployed to increase processing capacity in a big data context.
It can be integrated into big data systems, can discriminate into three configuration of the FPGA in the system. The accelerator can either be placed in the data path between network or storage and the CPU. It can be made between an IO-attached accelerator, where the FPGA has its own memory space, and a co-processor, in which the FPGA and the CPU communicate through shared memory.
Nowadays in every field of industry we are using some form of data analytics. The impact and possibilities of transparent and efficient integration of FPGAs in big data
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