Circuit Approaches for VLSI in Internet-of-Things Applications: A Review
KM SANDHYA BHASHKAR1 , Sushil Chandra Agrawal21M.Tech, VLSI, National Institute of electronics and information technology, U.P, India
2Principal & Technical Officer, Department of VLSI, National Institute of electronics and information technology, U.P, India
***
Abstract - Very-Large-Scale-Integration (VLSI) Circuit Techniques play a significant role in the development of the Internet of Things (IoT) devices. The IoT is a network of devices that are connected to the internet, enabling them to collect and exchange data. The data collected by these devices can be used to make informed decisions and automate processes. VLSI Circuit Techniquesrefertothemethodsusedto design and manufacture integrated circuits (ICs) that can be used in IoT devices. SoC is a technique used to integrate all the components of a system into a single chip. This technique is used in IoT devices to reduce the size of the device, lower power consumption and increase efficiency. IoT devices are often battery-powered, and as such, lowpowerconsumptionis critical. Low-power design techniques such as voltage scaling, clock gating, and power gating are used to reduce power consumption in IoT devices. RF design is essential in IoT devices that use wirelesscommunication.RFdesigntechniques such as low-noise amplifiers, power amplifiers, and frequency synthesizers are used to design wireless communication circuits for IoT devices. IoT devices often require the integration of analog and digital circuits. Mixed-signal design techniques are used to integrate analog and digital circuits in a single chip. Testing and Verification techniques are used to ensure that IoT devices meet the requiredspecifications.These techniques are used to detect defects and ensure that the device functions correctly. VLSI Circuit Techniques play a significant role in the development of IoT devices. These techniques are used to design and manufacture integrated circuits that can be used in IoT devices. The use of these techniques has enabled the development of smaller, more efficient, and low-power IoT devices.
Key Words: VLSI,IoTbased,Perforformance,VLSICircuit, IntegratredCircuit.
1. INTRODUCTION
ThedevelopmentofVLSIcircuitshasbeenoneofthemajor drivingforcesbehindthegrowthofthecomputerindustry. Thefirstintegratedcircuitsweredevelopedinthe1950sand 1960s and contained only a few transistors. However, advancesinsemiconductortechnologymadeitpossibleto fabricate ICs with thousands, and later millions, of transistors on a single chip. This allowed for the
development of microprocessors, which are the heart of moderncomputers.
ThedesignofVLSIcircuitsinvolvesacomplexsetofsteps, including design specification, logic synthesis, physical design,andtesting.Designspecificationinvolvesdefiningthe requirements of the circuit, such as its function, performance, and power consumption. Logic synthesis involves converting the design specification into a logic circuit, which can be implemented using a hardware descriptionlanguage(HDL)suchasVerilogorVHDL.
Physical design involves mapping the logic circuit onto a specificchiplayout,whichinvolvesoptimizingthelayoutfor performance, area, and power consumption. This step involves a range of techniques such as floor planning, placement, routing, and timing analysis. The final step is testing, which involves verifying the functionality and performance of the fabricated chip using a range of techniquessuchasfunctionaltesting,performancetesting, andfaulttesting.
One of the main challenges in designing VLSI circuits is powerconsumption.Asthenumberoftransistorsonachip increases,sodoesthepowerconsumption.Thiscanleadto issuessuchasheatdissipationand reducedbatterylife in portabledevices.Toaddressthis,designersusearangeof techniquessuchaslow-powercircuitdesign,powergating, anddynamicvoltage and frequencyscaling(DVFS).These techniques can reduce power consumption without compromisingperformanceorfunctionality.
Anotherchallengeisdesignverification,whichistheprocess of ensuring that the design meets the specification and is freeoferrors.Asthecomplexityofthedesignincreases,so does the complexity of verification. This has led to the development of a range of techniques such as simulation, formalverification,andemulation.
In addition to design challenges, VLSI circuits also face manufacturingchallenges.ThefabricationofICsinvolvesa complexsetofsteps,includinglithography,doping,etching, andmetallization.Thesestepsmustbeperformedwithhigh precisionandaccuracytoensurethattheresultingchipsare functional and reliable. Manufacturing defects can lead to reducedyield,increasedcosts,andreducedreliability.
Toaddressthesechallenges,designersandmanufacturers usearangeoftoolsandtechniquessuchascomputer-aided design(CAD),processsimulation,andprocesscontrol.These tools and techniques can help to optimize the design and manufacturingprocess,reducecosts,andimproveyieldand reliability.
VLSI circuits are used in a wide range of applications, includingmicroprocessors,memorychips,communication devices,anddigitalsignalprocessors.Microprocessorsare used in computers, smartphones, and other electronic devicestoperformcomplexcomputationsandrunsoftware applications. Memory chips are used to store data and program code, while communication devices are used to transmit and receive data over networks. Digital signal processors are used in audio and video processing applications.
5. Layout: This step involves arranging the components on the chip and designing the interconnectsbetweenthem.
6. Verification: Thisstepinvolvestestingthecircuit to ensure that it meets the specified performance andfunctionalityrequirements.
7. Manufacturing: Thisstepinvolvesthefabrication of the circuit on a silicon wafer using various processes such as lithography, etching, and deposition.
TheprincipleofVLSIcircuitdesignistooptimizethecircuit forperformance,power,andareawhileminimizingthecost andtime-to-market.Thisrequiresadeepunderstandingof the underlying technology and a systematic approach to designandverification.
1.2. Purpose of VLSI Circuit
VLSIcircuitsareusedinawiderangeofelectronicdevices, including computers, smartphones, digital cameras, and many other consumer electronics products. They are also used in industrial and scientific applications, such as automotive systems, aerospace systems, medical devices, andtelecommunicationsequipment.
TheprimarybenefitsofVLSIcircuitsarethattheyenablethe design of more powerful and versatile electronic devices withsmallersizeandlowerpowerconsumption.Thishasled tothedevelopmentofmanynewtechnologiesandproducts that have transformed the way we live and work, and continuetodriveinnovationintheelectronicsindustry.
1.3. Advantage and Disadvantage of VLSI Circuit
1.1. Principle of VLSI Circuit
The principle ofVLSI circuit designinvolvesthefollowing steps:
1. Specification: This involves defining the functionalityandperformancerequirementsofthe circuit.
2. Architecture: This step involves selecting the appropriate architecture and system-level design forthecircuitbasedonthespecifications.
3. Logic Design: This step involves the implementationofthecircuitusinglogicgatesand designingtheinterconnectionbetweenthegates.
4. Circuit Design: This step involves designing the individual transistors and other components that makeupthecircuit.
VLSI (Very Large Scale Integration) circuits are electronic circuitsthatcontainalarge numberoftransistors,diodes, resistors,andotherelectroniccomponentsintegratedontoa single chip. VLSI circuits offer several advantages and disadvantages,whicharediscussedbelow:
Advantages:
1. Size: VLSI circuits are very small in size, which makes them ideal for use in portable electronic devicessuchassmartphones,tablets,andlaptops.
2. Power Consumption: VLSIcircuitsconsumevery littlepower,makingthemidealforbattery-operated devices.
3. Reliability: The integration of a large number of componentsontoasinglechipreducesthenumber of interconnections, which in turn reduces the chances of failure due to a loose or faulty connection.
4. Performance: VLSI circuits offer high-speed performance, making them ideal for use in highspeed computing applications such as graphics processing, artificial intelligence, and machine learning.
5. Cost: VLSIcircuitscanbemanufacturedatalower cost than discrete electronic components, as the manufacturingprocessisautomatedandrequires lesslabor.
Disadvantages:
1. Complexity: The design and fabrication of VLSI circuits are complex and require a high level of expertise, makingthemmoreexpensivetodesign anddevelop.
2. Fabrication Process: The fabrication process for VLSI circuits is highly specialized and requires expensive equipment and clean room facilities, makingitdifficultforsmallcompaniestoenterthe market.
3. Testing: TestingVLSIcircuitsisdifficultandtimeconsuming,asthecircuitsarehighlyintegratedand anyfailureinonecomponentcanaffecttheentire circuit.
4. Heat Dissipation: VLSI circuits generate a lot of heat, which can cause reliability issues and limit theirperformance.
5. Vulnerability: VLSI circuits are vulnerable to electromagnetic interference (EMI) and radiation, which can cause data corruption and affecttheirperformance.
2. FULLY-INTEGRATED POWER MANAGEMENT CIRCUITS
Fully-integratedpowermanagementcircuitsareelectronic circuitsthataredesignedtomanagethepowerconsumption ofasystem.Thesecircuitsareintegratedintothesamechip ormoduleastherestofthesystemcomponents,suchasthe microprocessor,memory,andinput/outputinterfaces.
The primary function of power management circuits is to regulatethepowersupplytothevariouscomponentsofa system,sothattheyreceivethecorrectamountofvoltage and current for proper operation. These circuits can also helptoconservepowerbyshuttingdownorreducingpower tocomponentsthatarenotinuse.
Fully-integratedpowermanagementcircuitscanincludea widerangeoffunctions,suchasvoltageregulators,poweron reset circuits, battery chargers, and voltage monitors. Someofthekeybenefitsofthesecircuitsincludeincreased
efficiency, reduced power consumption, and improved systemreliability.
Overall,fully-integratedpowermanagementcircuitsplaya critical role in the design of modern electronic systems, helpingtoensurethattheyoperatereliablyandefficiently whileminimizingpowerconsumption.
3. LITERATURE REVIEW
Thepurposeofaliteraturereviewistoidentifygapsinthe existingresearch,highlightthestrengthsandweaknessesof differentstudies,andsynthesizetheinformationtoprovidea coherent and well-supported argument. A well-conducted literature review can also help to identify areas where furtherresearchisneeded.
Yammenavar, Gurunaik: This study aims to present a demonstration of a neural network that is constructed utilizingVLSItechnology.Thisistheobjectiveoftheinquiry. The use of analog weights in conjunction with a refresh circuitisonemethodthatmaybeutilizedtoachievestable weight storage. In electronic scales, you'll often find this particularsetup.Severalneuralnetworksmakeuseofanalog multipliers to realize synapses in their architecture. Even though the functions that were learned were analog, the networkcouldbereprogrammedtotakedigitalinputsand deliverdigitaloutputssothatitcouldlearnnewfunctions. Thiswouldallowthenetworktolearnnewfunctionseven though the functions that it had previously learned were analog. This would make it possible for the network to acquirenewskills.Someinstancesofdigitaloperationsthat have been effectively achieved via the use of network architectureare"and,""or,"and"not."
Madhavi et.al: Theriseinleakagepowerismadeworseby thefactthatdeep-submicronandnanometertechnologies need the reduction of device dimensions, supply voltages, andthresholdvoltagestoachievehighperformanceandlow dynamicpowerdissipation.Asadirectconsequenceofthis, overcomingtheobstacleofpowerlossvialeakagebecomes anextremelytoughissuetotakeon.WhenLCPMOSisused, thereisonlyoneLCT,andhowitoperatesisdeterminedby theoutputofthecircuititself.ThisisbecauseLCPMOSisa single-chip technology. In terms of its capabilities to decreaseleakagepowerwithoutsacrificingdynamicpower, LCPMOS is superior to other approaches for lowering leakage power, such as LECTOR, sleepy stack, and sleepy keeper,amongstothers.ThisisbecauseLCPMOScanreduce leakagepowerwithoutcompromisingdynamicpower.This isbecauseLECTOR,sleepystackandsleepykeepereachgive up some of their dynamic power to reduce their overall leaking power. This is made possible by the fact that LCPMOSdoesnotneedanyadditionalcontrolandmonitor circuitry,andinaddition,theapproachguaranteesthatthe exactlogicstatewillbepreserved.Thisenablesthetaskto becompleted.Becauseofthis,itisnowfeasibleforthisto
takeplace.TheLCPMOStechnique,whenappliedtogeneric logic circuits, has the potential to generate a reduction in leakagethatisupto80-92%lowerthanthatofconventional circuitswithequivalentfunctionality.Thisisincomparison tothepotentialreductioninleakagethatcanbegenerated byusingthePMOStechnique.Thisisaccomplishedwithout suffering any loss in the dynamic power's original state. There is a give-and-take connection between the area overheadandthepropagationdelayinthisspecificcase.One mustsacrificeonefortheother.
Senthil: Theobjectiveofelectricaldesignistoreachastate ofbalanceinwhichtheamountofperformancethatmaybe obtainedintermsofspeedismaximizedwhiletheamountof powerthatisrequiredintheprocessisminimizedasmuch aspossible.BecausethedesignersofVLSIcircuitsforlowpower applications need to adhere to a large number of degrees of freedom to achieve an acceptable amount of powerreduction,thedesignofVLSIcircuitsforlow-power applicationsisacomplexproblemthatcanbeapproached from several different points of view. This is because to achieve an acceptable amount of power reduction, the designersofVLSIcircuitsforlow-powerapplicationsneedto adhere to a large number of degrees of freedom. A low powerdesignflowhastofindsolutionstoallproblemsthat areassociatedwithpowerconsumptionateverystageofthe design process and abstraction level to achieve the maximum possible degree of effectiveness in terms of the amount of power that is used. This is very necessary to achievethebestpossibleefficiencyintheuseofelectricity. This page provides detailed information on a variety of concepts and approaches that have been investigated, developed,andusedinthepasttocutdownontheamount ofleakageanddynamicpower.Theconceptsandmethods thataredissectedinthisbodyofworkhavethepotentialto beofsignificantassistancetodesignerswhohavebeenfaced with the job of building low-power VLSI circuits. Applicationsthataretransportableandofamedicalnature arewhereyouwillmostoftencomeacrosstheuseofthese circuits.
Indira et.al: Thearithmeticandlogicalunitisanessential component in the design of digital circuits. Using the appropriatedesignapproachisonemethodforreducingthe amountofpowerthatisusedbythecircuit,whichisoneway to lower the amount of power that the circuit needs. This pieceofresearchpresentsaheuristictechniquethatmakes use of a gravitational search algorithm as a way of minimizing the amount of power that is lost as a consequenceofleakageinALUcircuits.Thismethodaimsto cut down on the amount of power that is wasted in ALU circuits.Thismethodisprovidedasameansofreducingthe quantityofpowerthatisdroppedthroughoutitsuse.Both 16-bitand32-bitALUinputtestcombinationsarecarefully consideredthroughoutthewholeofthedesignprocess,after which they are written using the verilog coding language. ThisisdonetodeveloptheMLVtoitsfullpotentialsothatit
canbeusedmoreeffectively.Thedata makeitpossibleto conclude that the GSA algorithm delivers better ideal test functionresultswhilesimultaneouslyminimizingboththe amountofleakagepowerandthenumberofrepetitionsthat are required. When the statistics are taken into consideration,onemaymakethisconclusion.Inconclusion, acomparativeanalysiswascarriedouttoprovideproofthat thelayoutisefficient.Itwasfoundthattheresultsachieved bythedesignweresuperiortotheresultsobtainedbythe GeneticAlgorithmincomparisontotheresultsobtainedby GeneticAlgorithm.Thiswasdeterminedbycomparingthe two sets of results. In the not-too-distant future, the developedmethod will have theabilityto beexpanded so thatitcanworkwitha64-bitinputvectorsettoprovidethe bestpossibleMLVthatcanbeaccomplished.Thiswilltake place to ensure that the greatest possible results are obtained.
Kundan, Ankit: The mapping technique based on cell reorderingthatwaspresentedinChapter4demonstrateda largegainintermsoflatencywhencomparedtotheDomino mapping method, which was mentioned earlier in this chapter. In addition, the area penalty that is applied all duringtheprocessofcellre-orderingisrestrictedtothebare minimumthatispracticallypossible.Thisisdonetoavoid anyunnecessarycomplications.Inparticular,theuseofthis tacticmakesthedesignusableunderconditionsthatcallfor high levels of performance. The decomposition-based method that has been presented here results in a lower numberoftransistorsneededasopposedtothestaticCMOS logic type that has been offered. The study that was referenced elsewhere suggests that hybrid CMOS circuits may be compared to exclusively dynamic and completely staticrealizations.Inaddition,wemayconcludethatmixed CMOS circuits are perfect for high-speed applications that needverylittlepower.Someexamplesoftheseapplications are mobile phones, portable digital gadgets, and other similarproducts.Theapproachforgatingtheclockbasedon pattern recognition that was disclosed brought about significant savings in the amount of power that was used. TheDominoblock'sclocksignalisgivenasignificantamount offocusinthischapterbecauseofthecrucialpartitplaysin theoveralloperationoftheblock.Asaconsequenceofthis, theentiredesignstartedtotakeoncharacteristicsthatwere similartothoseofseveralotherlow-powerapproachesthat were described in the relevant research. As a result, the likelihood of the concept being used in a range of applicationsthatmakeuseofportabledeviceshasincreased. It is possible to further expand the capabilities of the decomposition methods so that they may be used for functions of the Boolean data type that are only partly defined.Thisrevelationdoes,however,leavealotofissues unsolved and problems that need to be addressed, which pavesthewayforthisstudytobecontinuedandexpanded upon in the future. While the raw mapping method was being used, the gates could only be considered to be of a "and"or"or"kind.Suchcapabilitieshavethepotentialtobe
accounted for in the preliminary circuit mapping, from which an entirely new set of rules may subsequently be generatedtogoverncombinationoperations.Thiswouldbe donetoensurethatallpossiblecombinationsaretakeninto consideration.Whilecalculatingthedelay,itisalsofeasible to make use of notions such as the average case delay in terms of incompletely stated Boolean functions and the applicationoflogicaleffort.Bothoftheseconceptsmaybe used in the process of calculating the delay. Also, a broad numberofotherwaysformulti-objectiveoptimizationand choosingthebestcandidatefromtheParetooptimalfront mightberesearched.Thesestrategiesinclude:Whenyouuse the technique that we have offered, you will be able to optimizetheclockgatinglogicintermsofswitchingpower aswell asarea. Yet, the logic ofthegateshasa significant bearingontheamountofdelaythatthecircuitdisplays.Asa directconsequence ofthis,theperformancemeasure may alsobeincludedintheanalysis.
Megha et.al: Thisdigitalsystem,whichisadvantageousin allrespectsduetothesupportofoptimizationtechnologies, canbeusedtoimplementamethodofgettingthingsdone thatisbothcost-effectiveandefficient.Becauseweprefer things to be done automatically with fewer human interferencesastechnologycontinuestoadvanceatarapid pace, this digital system, which supports optimization technologies,canbeusedtoimplementthismethod.Thisis becausewelikeforthingstobedoneautomaticallywithas fewinterruptionsfromhumansaspossible.Thesebenefits includeareducedconsumptionofpower,asmallerarea,a fasterspeed,alowerlatency,alowereddelay,andenhanced frequency.Thereareagreatmanymoreadvantagesaswell. Thisdigitalsystemhasthepotentialtobeusedtoputinto action a method of getting things done that is not just efficient but also cost-effective. There have been serious effortsmade,usingEDAtechnology,totestoutavarietyof distinct approaches to the formulation of an optimization issuetofindtheoptimalsolution.ForCADtoolstoeffectively penetrate low-end applications, it is quite probable that extraconsiderations,suchasamoreextensiveoptimization plan that takes into account the life cycle of the product, wouldbenecessary.Thesignificantamountofrivalrythat existsinthisparticularsectorofthemarketwouldmakethis alikelyscenario.Todothis,wearemakinguseofanFPGA programmingdevicethatadoptsastraightforwardstrategy for the whole design process. When it comes to the frequencyofoperationandthesizeofthedevice,thedigital system designs that are utilized in VLSI technology are alreadyontheapproachofhittingsaturation.Thisisbecause technologyisbecomingsmallerandsmaller.Becauseofthis, theindustryasawholehasbeguntoplacealargerfocuson developmentsthatarebasedonarchitecturetocombatthis problem. The creation of superior digital solutions is now beingaffordedawindowofopportunitythatwillneverclose. Technologyinallofitsmanyforms,includinghardwareand software, is in a state of continuous growth, and with this
progresscomestheintroductionofnewdesigntrendsacross abroadvarietyofcomponenttypes.
Ranjan et.al: The primary objective of this research is to demonstrate,throughtheuseofpasstransistorlogicthatis based on multiplexers, how one may design a full adder architecturethatisdistinguishedbybothhighperformance andlowpowerconsumption.Thiswillbeaccomplishedby demonstratinghowonemaydesignafulladderarchitecture thatisbasedonmultiplexers.Thisprojecthasasecondary purpose that demonstrates how to achieve the primary targetoftheproject.Thewholeaddernotionthatisbeing shown here is realized with the help of several different logics.SERF,PFAL,andECRLarethreeofthelogicsthatfall withinthiscategory;nevertheless,thislistisnotexhaustive. Thiswasachievedintheworkthatisnowbeingshownhere inthislocation.Inaddition,theexecutionofthedesigntakes the use of pass transistor logic in combination with other circuitstocompletetheprocess.Thisisnecessarytodowhat hastobe done. Ascomparedtothenumberof transistors thatarerequiredtorealizethedesignofacompleteadder using CMOS by itself, the number of transistors that are required to realize the design of a full adder utilizing combined CMOS is a much lower quantity. Hence, putting fundamentalreasoningintopracticewhileyetclingingtoan ideal is not an impossibility. In adiabatic logic design, I discoveredthatthequantityofenergythatwasconverted was around forty percent lower when compared to the similar static CMOS design. This was a significant improvement.Thisenablestheadiabaticlogicarchitecture to work at a speedier pace when compared to the performance of a standard static CMOS full adder. This is madefeasiblebecausethismakesitpossible.Acarrylookahead adder that takes advantage of adiabatic logic was createdinthesecondsectionofthethesis.Asaresultofthis, it was possible to carry out a technique that was more effectivethan the designof theadder asa complete when takenintoconsiderationasawhole.
Dharminder: Thisarticlealsodisplaysnewandforthcoming technologiesthataremakingadvancementsinthe field of VLSI methodology and design, which is predicated on the research of VLSI design. First and foremost, familiarise yourselfwiththespecific concept,whichclarifieshowthe characteristicsofcertainknowledgesystems,methodologies, andsubstructuresinfluencetheextentandratesofdiffusion, creation, convergence, knowledge, integration, and displacement. If you want to have a comprehensive comprehensionoftheMead-Conwaymethod,thefirstthing youneedtodoiseducateyourselfontheparticularconcept. The process of designing VLSI is divided into several separateparts,andeachofthesepartsiscoveredinsome detail.Thispagecontainsviewsandstudiesonfundamental cognitiveandsocialphenomenathatoccurthroughoutthe theoryformulation,testing, andtheoryrevisionprocesses thatareinvolvedinthedesignofdesignknowledge.These
activitiesareengagedinthedesignofdesignknowledge.The creationofdesignknowledgeissaidtoentailcertainsteps, whicharestatedasbeinginvolved.Asadirectresultofour efforts,wenowhavetheself-assuranceandcomprehension necessary to delve more deeply into the qualities of knowledge as well as the processes that contribute to its development.Thiswasmadepossibleasa direct result of the fact that our efforts have directly contributed to our success. As a direct result of this, we are analyzing the possibilities for the practical application of findings from computerscienceandartificialintelligencetothecreation andexecutionofnewconceptsforknowledgeengineering. Integrationonaverylargescalemaybeusedtothesolution of a wide range of issues in the field of electronics. The aforementioned text suggests a potential means by which one'stotalpowerlevelmightbedecreased.TheissueofVLSI research and design technique is discussed in a great number of papers, and VLSI is one of the themes that are discussed in these articles. In addition, a large number of differentstrategieswereusedtoaddressthecomplexissues that were existing inside the computer and electronics systems. The background of very large-scale integration (VLSI)wascoveredindetailinthebooktitled"TheLayoutof the VLSI Design Techniques" written by Lynn Conway. According to the information presented in the book, an investigationandresearchprojectentitledelectroniccircuit designswasinitiated bya Britishscientist by the name of Carver Pear brandy in the early 1970s. Throughout this series, he discussed how large-scale work might be accomplishedwiththeassistanceoflittlechips.Duringthis period,healsoestablishedthenMOSdesignbusiness.
4. CONCLUSION
ToincreasetheperformanceofaVLSIcircuit,herearesome generaltipsthatcanbefollowed:
One of the easiest ways to increase the performance of a VLSI circuit is to reduce its size. This can be done by optimizingthedesignofthecircuitandreducingthenumber of components used. The use of advanced fabrication processescanalsosignificantlyimprovetheperformanceof VLSIcircuits.Theseprocessesincludetechnologiessuchas FinFETs, which provide better control over the flow of electronsthroughthecircuit.Powerconsumptionisa key factor that affects the performance of VLSI circuits. By optimizing the power consumption of the circuit, you can improveitsperformance.Thiscanbeachievedthroughthe use of low-power design techniques such as clock gating, powergating,andvoltagescaling.TheclockspeedofaVLSI circuit is another important factor that affects its performance. By increasing the clock speed of the circuit, you can improve its performance. This can be done by optimizingthedesignoftheclockdistributionnetworkand using advanced clock generation techniques. Parallel processingisanothertechniquethatcanbeusedtoimprove the performance of VLSI circuits. By using multiple
processingcores,youcanincreasetheprocessingpowerof thecircuitandimproveitsperformance.Signalpropagation delayisanotherfactorthataffectstheperformanceofVLSI circuits.Byreducingthesignalpropagationdelaythrough the use of advanced interconnect technologies and optimizing the routing of signals, you can improve the performanceofthecircuit.
REFERENCE
[1] J.P. Fishburn and A.E. Dunlop, "TILOS: A Posynomial Programming Approach to Transistor Sizing," in IEEE International Conference on Computer Aided Design, pg. 326-328,November1985.
[2] D. Marple, "Transistor Size Optimization in the Tailor LayoutSystem,"inIEEEDesignAutomationConference,Pg. 43-48,1989.
[3] D. Marple, "Performance Optimization of Digital VLSI Circuits", Technical report: CSL-TR-86-308, Stanford University,1985.
[4]J.YuenandC.Svenson,"CMOSCircuitSpeedOptimization based on Switch Level Simulation," LSI Design Center, LinkopingUniversity,Sweden.
[5]K.Hedlund,"ModelsandAlgorithmsforTransistorSizing in MOS Circuits," in IEEE International Conference on ComputerAidedDesign,pages12-14,October,1984.
[6] K. Hedlund, "Aesop: A Tool for Automated Transistor Sizing," in Proceedings of the 24th Design Automation Conference,pg.114-120,June,1987.
[7] H. Hsieh and D. Ostapko, "Size Optimization for CMOS BasicCellsofVLSI",ISCAS,1992.
[8] M. Crit, "Transistor Sizing in CMOS Circuits," in Proceedingsofthe24thDesignAutomationConference,pg. 121-123,June,1987.
[9] M. Shoji, "FET Scaling in Domino CMOS Gates," IEEE Journal of Solid-State Circuits, vol. sc-20, No. 5, October 1985.
[10] M. Matson and L. Glasser, "Macromodeling and Optimization of Digital MOS VLSI Circuits," IEEE TransactionsonComputer-AidedDesign,Vol.CAD-5,No.4, October1986.
[11]M.Matson,"MacromodelingandOptimizationofDigital MOS VLSI Circuits," Ph.D. dissertation, Massachusetts InstituteofTechnology,Feb.1985.
[12]L.Brocco,S.McCormickandJ.Allen,"Macromodeling CMOSCircuitsforTimingSimulation",IEEETransactionson Computer-AidedDesign,Vol.7,No.12,December1988.
[13] A. Ghosh, S. Devadas, K. Keutzer and J. White, "EstimationofAverageSwitchingActivityinCombinational and Sequential Circuits," Proceedings of the 29th Design AutomationConference,pg.253-259,1992.
[14] S. Devadas, K. Keutzer and J. White, "Estimation of Power Dissipation in CMOS Combinational Circuits Using Boolean Function Manipulation,", IEEE Transactions on Computer-AidedDesign,Vol.11,No.3,March1992.
[15]A.Shen,A.Ghosh,S.Devadas,k.Keutzer,"OnAverage Power Dissipation and Random Testability of CMOS Combinational Logic Networks," in IEEE International Conference on Computer-Aided Design, pg. 402-407, November1992.
[16] A. Chandrakasan, S. Sheng and R. Brodersen, "LowPower CMOS Digital Design," IEEE Journal of Solid-State Circuits,Vol.27,No.4,April1992.
[17] M. Berkelaar and J. Jess, "Gate Sizing in MOS Digital Circuits with Linear Programming," Proceedings of the EuropeanDesignAutomationConference1990,pg.217-221.
[18] M. Berkelaar, "Area-Power-Delay Trade-off in Logic Synthesis," Ph.D. dissertation, Technische Universiteit Eindhoven,September1992.
[19]V.Tiwari,P.Ashar,S.Malik,"TechnologyMappingfor LowPower,"inProceedingsofthe30thDesignAutomation Conference,pg.74-79,1993.
[20] C. Tsui, M. Pedram, A. Despain, "Technology Decomposition and Mapping Targeting Low Power Dissipation,"inProceedingsofthe30thDesignAutomation Conference,pg.68-73,1993.
[21] E. Detjeus, G. Gannot, "Technology Mapping in MIS," IEEEInternationalConferenceonComputerAidedDesign, pg.116-119,1987
[22]K.Keutzer,K.Kolwicz,M.Lega,"ImpactofLIbrarySIze ontheQualityofAutomatedSynthesis,"IEEEInternational ConferenceonComputerAidedDesign,pg.120-123,1987.