International Research Journal of Engineering and Technology (IRJET)
e-ISSN: 2395-0056
Volume: 10 Issue: 04 | Apr 2023
p-ISSN: 2395-0072
www.irjet.net
Performance analysis of NOR CAM cell using CMOS-HP, CMOS-LP and FinFET 16nm technology Ratnamala S1, Dr. Vasundhara Patel K.S2 1Dept. of ECE BMS College of Engineering, Bengaluru, India
2Proffessor, Dept. of ECE BMS College of Engineering, Bengaluru, India
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Abstract - Content addressable memory (CAM) is used in
many applications such as Network routers, Cache controllers and low power CPU design. It searches total memory array in one clock cycle. CAM cell contains memory cell and match circuit. Memory cell contains stored data and match circuit compares the input data and stored data. Search operation happens in parallel fashion, access time is less and power dissipation will be more. This paper presents functionality of NOR based CAM cell implemented using CMOS-LP, CMOS-HP, FinFET 16nm technology and power reduction in HSPICE tool. Figure 1. CAM conceptual diagram
Key Words: NOR CAM; FinFET; CMOS-LP; CMOS-HP; HSPICE tool
1.1 CMOS
1.INTRODUCTION
Both NMOS and PMOS has similar characteristics during on and off state and hence it is used in CMOS Technology to realize various logic functions. Over Bipolar or the previous popular NMOS technologies CMOS technology has extremely low power consumption in static conditions as they draw power only during switching operation. This allows integrating much larger number of logic gates on the VLSI IC when compared to Bipolar or NMOS technologies.
In present day scenario there is a need of better performance with respect to increase in speed with reduced power dissipation. The high frequency of CAM is achieved through scaling the transistors. Scaling of transistors leads to reduction in channel length. This will reduce the transit time of the charge carriers which increases the frequency of operation of the device [1]. In order to overcome short channel effects FinFETs has evolved. FinFETs has become an alternative because of its scalability and compatibility with planar CMOS [2].
In order to implement CMOS-HP the VDD and Vth is kept lower in order to improve the speed in performance. Likewise, in order to implement the CMOS-LP the VDD and Vth will be high in order to reduce the power dissipation in transistor.
Content addressable memory (CAM) is associative memory where data is given as input and address is given as output. The search operation in CAM happens in parallel fashion and hence CAM is faster which causes high power dissipation and less access time [3]. In the Fig 1, the data is sent to the search data register through searchlines to the memory cells. This input data is compared with the stored data. When the stored data is matched with the input data, the corresponding match line will be enabled. The address of the matched data will be considered as the output.
1.2 FINFET FinFET is a three-dimensional transistor which is made on Silicon wafers (Bulk FinFET) or silicon on insulator (SoI FinFET). It is made of a thin fin material embedded on a substrate. Channel will be fully wrapped around by the gate of device, which have control over channel as shown in Fig 2 [4]. Continuous scaling of MOSFET to lower technology nodes has become very challenging aspect. Due to short channel effects and leakage current issues made a way to the evolution of FinFET technology.
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