: In recent days, demand for VLSI or ULSI has been improved drastically due to its robustness and efficiency. Due to
peoples’ demand of having miniature device with more battery life the VLSI Engineers are trying to innovate the existing designs
by slightly modifying the pre-existing one. One of such examples is to use pass transistor logic, which has tremendous advantage
over all other logics. Thus by exploiting the architecture of such logics may give rise to a device which satisfies all the demands
of the market. In this work, the design of a low power and area efficient hybrid full adder is proposed which uses the pass
transistor logic.
