This Is A College Student Assignment The Goal Is To Implement the Sin This is a college student assignment. The goal is to implement the single cycle processor using VHDL language. The processor should be able to implement the instructions shown in attachment 'Assignment.docx' which also provides the most of details about this assignment. Besides, a sample codes is provided in the zip file whose style is to be followed in the assignment. Note that the lab files provided are not completed by students so it may not properly run. The program is to be run by ModelSim. Please briefly read the attachments before you go.
Paper For Above instruction Introduction Design and implementation of a single-cycle processor using VHDL is a fundamental exercise in understanding computer architecture and digital design. Such processors execute instructions through a single, continuous cycle, where each instruction is fetched, decoded, executed, and results written back within one clock period. This paper details the steps involved in designing a simplified single-cycle processor tailored to specific instructions outlined in the assignment documentation, with emphasis on VHDL coding, simulation, and validation using ModelSim. Understanding the Requirements The assignment specifies implementing a subset of instructions, likely including arithmetic, logic, data transfer, and control instructions, as specified in 'Assignment.docx'. While the detailed instruction set is not explicitly reiterated here, common instructions include add, subtract, load, store, branch, and jump instructions. The implementation must adhere closely to the provided instruction formats, opcodes, and control signals, ensuring proper decoding and execution within a single clock cycle. Design Approach The design process involves creating separate VHDL modules for different components of the processor, integrating them to form a cohesive single-cycle architecture. These components include the Program Counter (PC), Instruction Memory, Register File, ALU, Data Memory, Control Unit, and various multiplexers and sign/zero extendors. The overall control signals orchestrate data flow and operation execution based on the instruction opcode. Implementing the Processor